Recently, the features such as spontaneous polarization and high dielectric constant of ferroelectric film have attracted interest in the field of the integrated circuit, and intensive efforts have been concentrated on research and development for application of the ferroelectric film into nonvolatile random access memory (RAM) and dynamic RAM (DRAM) of high degree of integration. In particular, lately, the DRAM having capacitor using dielectric film of high dielectric constant is being rapidly developed for achieving necessary capacity and simplifying the complicated cell structure of DRAM.
Concerning a conventional semiconductor device having capacitor, an example of memory cell of DRAM is explained below.
FIG. 10 is a sectional view of this memory cell. In FIG. 10, numeral 1 denotes a silicon substrate, 2 is a field oxide film (LOCOS film), 3 is an N.sup.+ diffusion layer composing the source or the drain of transistor, and 4 is a word line composed of polycide film or polycrystalline silicon film. Numeral 5 is a bottom electrode made of polycrystalline silicon film connected to the diffusion layer 3, 6 is a dielectric film laminating silicon nitride film and silicon dioxide film, and 7 is a top electrode composed of polycrystalline silicon film, and a capacitor is composed of these films. Meanwhile, 5a, 6a and 7a are bumps of the bottom electrode 5, dielectric film 6, and top electrode 7, respectively. Numeral 8 is a first interlayer insulating film, 9 is a first wiring for bit line made of polycide film or aluminum alloy film, 10 is a second interlayer insulating film, 11 is a second wiring made of aluminum alloy film, and 12 is a protector film.
The memory cell of DRAM is usually composed of one transistor and one capacitor. The memory cell of a conventional DRAM is very complicated in structure because the capacitor having a necessary capacity is formed in a fine memory cell region. That is, as shown in FIG. 10, projecting portions 5a, 6a, 7a are formed in order to increase the capacity to cope with widening of the total area of the capacitor. Such conventional constitution, however, involved the following problems.
First of all, since the dielectric film 6 of the capacitor in the memory cell is formed in a laminate film of silicon nitride film (relative dielectric constant about 7.5) and silicon dioxide film (relative dielectric constant about 3.9), the relative dielectric constant is small. Therefore, to form a capacitor possessing a capacity necessary for memory action, the structure and manufacturing process of the capacitor are very complicated. For example, to realize a DRAM of 65 megabits, a capacity of 30 fF is required in a memory region of about 1.5 .mu.m.sup.2. Accordingly, when the conventional laminate film of silicon nitride film and silicon dioxide film is used as dielectric film 6, if the dielectric film 6 is reduced to a thickness of 5 nm as converted to silicon dioxide, the projecting portion 5a of the bottom electrode must be built up to a height of 1.5 .mu.m. To form such high projecting portion, it requires a complicated manufacturing process comprising many process steps. Besides, leak currents are present in the junction area between P-type well and the N.sup.+ diffusion layer of transistors for composing memory cell and in the dielectric film for composing the capacitor. Therefore, the refreshing cycle necessary for holding the memory data of the memory cell depend on these leak currents, it is difficult to decrease the total area of the capacitor without shortening the refresh cycle.